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am26c32 slls104k ? december 1990 ? revised june 2015 am26c32 quadruple differential line receiver 1 features 3 description the am26c32 device is a quadruple differential 1 ? meets or exceeds the requirements of ansi line receiver for balanced or unbalanced digital tia/eia-422-b, tia/eia-423-b, and itu data transmission. the enable function is recommendation v.10 and v.11 common to all four receivers and offers a choice ? low power, i cc = 10 ma typical of active-high or active-low input. the 3-state outputs permit connection directly to a bus- ? 7-v common-mode range with 200-mv organized system. fail-safe design specifies that sensitivity if the inputs are open, the outputs always are ? input hysteresis: 60 mv typical high. the am26c32 devices are manufactured ? t pd = 17 ns typical using a bicmos process, which is a combination ? operates from a single 5-v supply of bipolar and cmos transistors. this process provides the high voltage and current of bipolar ? 3-state outputs with the low power of cmos to reduce the power ? input fail-safe circuitry consumption to about one-fifth that of the ? improved replacements for am26ls32 device standard am26ls32, while maintaining ac and dc performance. ? available in q-temp automotive device information (1) 2 applications part number package body size (nom) ? high-reliability automotive applications am26c32n pdip (16) 19.30 mm 6.35 mm ? factory automation am26c32ns so (16) 10.20 mm 5.30 mm ? atm and cash counters am26c32d soic (16) 9.90 mm 3.90 mm ? smart grid am26c32pw tssop (16) 5.00 mm 4.40 mm ? ac and servo motor drives am26c32j cdip (16) 21.34 mm 6.92 mm am26c32w cfp (16) 10.16 mm 6.73 mm am26c32fk lccc (20) 8.90 mm 8.90 mm (1) for all available packages, see the orderable addendum at the end of the data sheet. simplified schematic 1 an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. productfolder 4y 3y 2y 1y 4b 4a 3b 3a 2b 2a 1b 1a g g 412 2 1 6 7 10 9 14 15 35 11 13 support &community tools & software technical documents sample &buy
am26c32 slls104k ? december 1990 ? revised june 2015 www.ti.com table of contents 8.2 functional block diagram ......................................... 8 1 features .................................................................. 1 8.3 feature description ................................................... 8 2 applications ........................................................... 1 8.4 device functional modes .......................................... 9 3 description ............................................................. 1 9 application and implementation ........................ 10 4 revision history ..................................................... 2 9.1 application information ............................................ 10 5 pin configuration and functions ......................... 3 9.2 typical application ................................................. 10 6 specifications ......................................................... 4 10 power supply recommendations ..................... 12 6.1 absolute maximum ratings ...................................... 4 11 layout ................................................................... 12 6.2 esd ratings .............................................................. 4 11.1 layout guidelines ................................................. 12 6.3 recommended operating conditions ....................... 4 11.2 layout example .................................................... 12 6.4 thermal information ................................................. 4 12 device and documentation support ................. 13 6.5 electrical characteristics ........................................... 5 12.1 community resources .......................................... 13 6.6 switching characteristics .......................................... 5 12.2 trademarks ........................................................... 13 6.7 typical characteristics .............................................. 6 12.3 electrostatic discharge caution ............................ 13 7 parameter measurement information .................. 7 12.4 glossary ................................................................ 13 8 detailed description .............................................. 8 13 mechanical, packaging, and orderable 8.1 overview ................................................................... 8 information ........................................................... 13 4 revision history changes from revision j (february 2014) to revision k page ? added pin configuration and functions section, esd ratings table, feature description section, device functional modes , application and implementation section, power supply recommendations section, layout section, device and documentation support section, and mechanical, packaging, and orderable information section ............................... 1 changes from revision i (september 2004) to revision j page ? updated document to new ti data sheet format - no specification changes ......................................................................... 1 ? deleted ordering information table. ....................................................................................................................................... 1 ? updated features ................................................................................................................................................................... 1 ? added esd warning .............................................................................................................................................................. 3 2 submit documentation feedback copyright ? 1990 ? 2015, texas instruments incorporated product folder links: am26c32
am26c32 www.ti.com slls104k ? december 1990 ? revised june 2015 5 pin configuration and functions d, n, ns, pw, j or w package fk package 16-pin soic, pdip, so, tssop, cdip, or cfp 20-pin lccc top view top view pin functions pin i/o description soic, pdip, so, name lccc tssop, cfp, or cdip 1a 3 2 i rs422/rs485 differential input (noninverting) 1b 2 1 i rs422/rs485 differential input (inverting) 1y 4 3 o logic level output 2a 8 6 i rs422/rs485 differential input (noninverting) 2b 9 7 i rs422/rs485 differential input (inverting) 2y 7 5 o logic level output 3a 13 10 i rs422/rs485 differential input (noninverting) 3b 12 9 i rs422/rs485 differential input (inverting) 3y 14 11 o logic level output 4a 18 14 i rs422/rs485 differential input (noninverting) 4b 19 15 i rs422/rs485 differential input (inverting) 4y 17 13 o logic level output g 5 4 i active-high select g 15 12 i active-low select gnd 10 8 ? ground 1 6 nc (1) ? ? do not connect 11 16 v cc 20 16 ? power supply (1) nc ? no internal connection. copyright ? 1990 ? 2015, texas instruments incorporated submit documentation feedback 3 product folder links: am26c32 12 3 4 5 6 7 8 1615 14 13 12 11 10 9 1b 1a1y g 2y2a 2b gnd v cc 4b4a 4y g 3y3a 3b 3 2 1 20 19 9 10 11 12 13 45 6 7 8 1817 16 15 14 4a 4ync g 3y 1y g nc 2y2a 1a1b nc 3b3a 4b 2b gnd nc cc v
am26c32 slls104k ? december 1990 ? revised june 2015 www.ti.com 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit v cc supply voltage (2) 7 v a or b inputs ? 11 14 v i input voltage v g or g inputs ? 0.5 v cc + 0.5 v id differential input voltage ? 14 14 v v o output voltage ? 0.5 v cc + 0.5 v i o output current 25 ma t stg storage temperature -65 150 c (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions . exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) all voltage values, except differential voltages, are with respect to the network ground terminal. 6.2 esd ratings value unit human body model (hbm), per ansi/esda/jedec js-001 (1) 3000 v (esd) electrostatic discharge v charged-device model (cdm), per jedec specification jesd22- 2000 c101 (2) (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.3 recommended operating conditions over operating free-air temperature range (unless otherwise noted) min nom max unit v cc supply voltage 4.5 5 5.5 v v ih high-level input voltage 2 v cc v v il low-level input voltage 0 0.8 v v ic common-mode input voltage -7 +7 v i oh high-level output current ? 6 ma i ol low-level output current 6 ma am26c32c 0 70 am26c32i ? 40 85 t a operating free-air temperature c am26c32q ? 40 125 am26c32m ? 55 125 6.4 thermal information am26c32 thermal metric (1) d (soic) n (pdip) ns (so) pw (tssop) unit 16 pins 16 pins 16 pins 16 pins r ja junction-to-ambient thermal resistance 73 67 64 108 c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report, spra953 . 4 submit documentation feedback copyright ? 1990 ? 2015, texas instruments incorporated product folder links: am26c32
am26c32 www.ti.com slls104k ? december 1990 ? revised june 2015 6.5 electrical characteristics over operating free-air temperature range (unless otherwise noted) parameter test conditions min typ (1) max unit v ic = ? 7 v to 7 v 0.2 differential input high-threshold v o = v oh(min) , i oh = ? 440 v it+ v voltage a v ic = 0 v to 5.5 v 0.1 v ic = ? 7 v to 7 v ? 0.2 (2) differential input low-threshold v it ? v o = 0.45 v, i ol = 8 ma v voltage v ic = 0 v to 5.5 v ? 0.1 (2) v hys hysteresis voltage (v it+ ? v it ? ) 60 mv v ik enable input clamp voltage v cc = 4.5 v, i i = ? 18 ma ? 1.5 v v oh high-level output voltage v id = 200 mv, i oh = ? 6 ma 3.8 v v ol low-level output voltage v id = ? 200 mv, i ol = 6 ma 0.2 0.3 v off-state (high-impedance state) i oz v o = v cc or gnd 0.5 5 a output current v i = 10 v, other input at 0 v 1.5 a i i line input current v i = ? 10 v, other input at 0 v ? 2.5 a i ih high-level enable current v i = 2.7 v 20 a i il low-level enable current v i = 0.4 v ? 100 a r i input resistance one input to ground 12 17 k i cc quiescent supply current v cc = 5.5 v 10 15 ma (1) all typical values are at v cc = 5 v, v ic = 0, and t a = 25 c. (2) the algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common- mode input voltage. 6.6 switching characteristics over operating free-air temperature range, c l = 50 pf (unless otherwise noted) am26c32c am26c32q am26c32i am26c32m parameter test conditions unit min typ (1) max min typ (1) max t plh propagation delay time, 9 17 27 9 17 27 ns low- to high-level output see figure 2 t phl propagation delay time, 9 17 27 9 17 27 ns high- to low-level output t tlh output transition time, 4 9 4 10 ns low- to high-level output see figure 2 t thl output transition time, 4 9 4 9 ns high- to low-level output t pzh output enable time to 13 22 13 22 ns high-level see figure 3 t pzl output enable time to 13 22 13 22 ns low-level t phz output disable time 13 22 13 26 ns from high-level see figure 3 t plz output disable time 13 22 13 25 ns from low-level (1) all typical values are at v cc = 5 v, t a = 25 c. copyright ? 1990 ? 2015, texas instruments incorporated submit documentation feedback 5 product folder links: am26c32
am26c32 slls104k ? december 1990 ? revised june 2015 www.ti.com 6.7 typical characteristics figure 1. output voltage vs input current 6 submit documentation feedback copyright ? 1990 ? 2015, texas instruments incorporated product folder links: am26c32 1 0 1 2 3 4 5 6 0 10 20 30 40 50 output voltage - v logic input current - ma high low c001
am26c32 www.ti.com slls104k ? december 1990 ? revised june 2015 7 parameter measurement information a. c l includes probe and jig capacitance. figure 2. switching test circuit and voltage waveforms a. c l includes probe and jig capacitance. b. the input pulse is supplied by a generator having the following characteristics: prr = 1 mhz, duty cycle 50%, t r = t f = 6 ns. figure 3. enable/disable time test circuit and output voltage waveforms copyright ? 1990 ? 2015, texas instruments incorporated submit documentation feedback 7 product folder links: am26c32 test circuit voltage waveforms 0 v output v oh v ol 10% 90% 90% 10% t tlh t thl t plh t phl 2.5 v ?2.5 v 50% input device under test ab v cc c l = 50 pf (see note a) input test circuit device under test g input g input v cc s1 r l = 1 k c l = 50 pf (see note a) v id = 2.5 v voltage waveforms t pzl , t plz measurement: s1 to v cc t pzh , t phz measurement: s1 to gnd 1.3 v g g (see note b) output (with v id = 2.5 v) output (with v id = ?2.5 v) t pzh t phz t pzh t phz t pzl t plz t pzl t plz v oh ?0.5 v v ol + 0.5 v v oh ?0.5 v v ol + 0.5 v 3 v0 v 3 v 0 v v oh v ol v oh v ol 1.3 v 50%50% a input b input
am26c32 slls104k ? december 1990 ? revised june 2015 www.ti.com 8 detailed description 8.1 overview the am26c32 is a quadruple differential line receiver that meets the necessary requirements for nsi tia/eia- 422-b, tia/eia-423-b, and itu recommendation v.10 and v.11. this device allows a low power or low voltage mcu to interface with heavy machinery, subsystems and other devices through long wires of up to 1000m, giving any design a reliable and easy to use connection. as any rs422 interface, the am26c32 works in a differential voltage range, which enables very good signal integrity. 8.2 functional block diagram 8.3 feature description 8.3.1 7-v common-mode range with 200-mv sensitivity for a common-mode voltage varying from -7v to 7v, the input voltage is acceptable in low ranges greater than 200 mv as a standard. 8.3.2 input fail-safe circuitry rs-485 specifies that the receiver output state should be logic high for differential input voltages of v ab +200 mv and logic low for v ab ? 200 mv. for input voltages in between these limits, a receiver ? s output state is not defined and can randomly assume high or low. removing the uncertainty of random output states, modern transceiver designs include internal biasing circuits that put the receiver output into a defined state (typically high) in the absence of a valid input signal. a loss of input signal can be caused by an pen circuit caused by a wire break or the unintentional disconnection of a transceiver from the bus. the am26c32 has an internal circuit that ensures functionality during an idle bus. 8.3.3 active-high and active-low the device can be configure using the g and g logic inputs to select receiver output. the high voltage or logic 1 on the g pin, allows the device to operate on an active-high and having a low voltage or logic 0 on the g enables active low operation. these are simply a way to configure the logic to match that of the receiving or transmitting controller or microprocessor. 8.3.4 operates from a single 5-v supply both the logic and receivers operate from a single 5-v rail, making designs much more simple. the line drivers and receivers can operate off the same rail as the host controller or a similar low voltage supply, thus simplifying power structure. 8 submit documentation feedback copyright ? 1990 ? 2015, texas instruments incorporated product folder links: am26c32 input v cc equivalent of a or b input typical of all outputs output v cc v cc 1.7 k nom gnd gnd 1.7 k nom 17 k nom 288 k nom v cc (a inputs) or gnd (b inputs) input gnd equivalent of g or g input
am26c32 www.ti.com slls104k ? december 1990 ? revised june 2015 8.4 device functional modes 8.4.1 enable and disable the receivers implemented in these rs422 devices can be configured using the g and g pins to be enabled or disabled. this allows users to ignore or filter out transmissions as desired. table 1. function table (each receiver) differentia enables output l input a/b g g y h x h v id v it+ x l h h x ? v it < v id < v it+ x l ? h x l v id v it- x l l x l h z copyright ? 1990 ? 2015, texas instruments incorporated submit documentation feedback 9 product folder links: am26c32
am26c32 slls104k ? december 1990 ? revised june 2015 www.ti.com 9 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 9.1 application information when designing a system that uses drivers, receivers, and transceivers that comply with rs-422 or rs-485, proper cable termination is essential for highly reliable applications with reduced reflections in the transmission line. because rs-422 allows only one driver on the bus, if termination is used, it is placed only at the end of the cable near the last receiver. in general, rs-485 requires termination at both ends of the cable. factors to consider when determining the type of termination usually are performance requirements of the application and the ever-present factor, cost. the different types of termination techniques discussed are unterminated lines, parallel termination, ac termination, and multipoint termination. laboratory waveforms for each termination technique (except multipoint termination) illustrate the usefulness and robustness of rs-422 (and, indirectly, rs- 485). similar results can be obtained if 485-compliant devices and termination techniques are used. for laboratory experiments, 100 feet of 100- , 24-awg, twisted-pair cable (bertek) was used. a single driver and receiver, ti am26c31c and am26c32c, respectively, were tested at room temperature with a 5-v supply voltage. two plots per termination technique are shown. in each plot, the top waveform is the driver input and the bottom waveform is the receiver output. to show voltage waveforms related to transmission-line reflections, the first plot shows output waveforms from the driver at the start of the cable; the second plot shows input waveforms to the receiver at the far end of the cable. 9.2 typical application figure 4. differential terminated configuration 9.2.1 design requirements resistor and capacitor (if used) termination values are shown for each laboratory experiment, but vary from system to system. for example, the termination resistor, r t , must be within 20% of the characteristic impedance, zo , of the cable and can vary from about 80 to 120 . 9.2.2 detailed design procedure figure 4 shows a configuration with no termination. although reflections are present at the receiver inputs at a data signaling rate of 200 kbps with no termination, the rs-422-compliant receiver reads only the input differential voltage and produces a clean signal at the output. 10 submit documentation feedback copyright ? 1990 ? 2015, texas instruments incorporated product folder links: am26c32 d in d am26c31 (one driver) d r t am26c32 (one receiver) r out
am26c32 www.ti.com slls104k ? december 1990 ? revised june 2015 typical application (continued) 9.2.3 application curve figure 5. differential 120- terminated output waveforms (cat 5e cable) copyright ? 1990 ? 2015, texas instruments incorporated submit documentation feedback 11 product folder links: am26c32 3 2 1 0 1 2 3 4 5 0 0.1 0.2 0.3 0.4 0.5 voltage (v) time ( s) y a/b c001
am26c32 slls104k ? december 1990 ? revised june 2015 www.ti.com 10 power supply recommendations place 0.1- f bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high impedance power supplies. 11 layout 11.1 layout guidelines for best operational performance of the device, use good pcb layout practices, including: ? noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry. ? connect low-esr, 0.1- f ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. a single bypass capacitor from v+ to ground is applicable for single supply applications. ? separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. one or more layers on multilayer pcbs are usually devoted to ground planes. a ground plane helps distribute heat and reduces emi noise pickup. make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. ? to reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. if it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace. ? place the external components as close to the device as possible. keeping rf and rg close to the inverting input minimizes parasitic capacitance. ? keep the length of input traces as short as possible. always remember that the input traces are the most sensitive part of the circuit. ? consider a driven, low-impedance guard ring around the critical traces. a guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 11.2 layout example figure 6. trace layout on pcb and recommendations 12 submit documentation feedback copyright ? 1990 ? 2015, texas instruments incorporated product folder links: am26c32 am26c32 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1b 1a 1y g 2y 2a 2b gnd v cc 4b 4a 4y g 3y 3a 3b 0.1f v dd termination resistor reduce logic signal trace when possible
am26c32 www.ti.com slls104k ? december 1990 ? revised june 2015 12 device and documentation support 12.1 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 12.2 trademarks e2e is a trademark of texas instruments. all other trademarks are the property of their respective owners. 12.3 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 12.4 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 13 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation. copyright ? 1990 ? 2015, texas instruments incorporated submit documentation feedback 13 product folder links: am26c32
package option addendum www.ti.com 26-sep-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples 5962-9164001q2a active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 5962- 9164001q2a am26c32 mfkb 5962-9164001qea active cdip j 16 1 tbd a42 n / a for pkg type -55 to 125 5962-9164001qe a am26c32mjb 5962-9164001qfa active cfp w 16 1 tbd a42 n / a for pkg type -55 to 125 5962-9164001qf a am26c32mwb am26c32cd active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 am26c32c am26c32cdbr active ssop db 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 26c32 am26c32cde4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 am26c32c am26c32cdr active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 am26c32c am26c32cdre4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 am26c32c am26c32cn active pdip n 16 25 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 am26c32cn am26c32cne4 active pdip n 16 25 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 am26c32cn am26c32cnsr active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 26c32 AM26C32CNSRG4 active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 26c32 am26c32id active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 am26c32i am26c32ide4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 am26c32i am26c32idg4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 am26c32i
package option addendum www.ti.com 26-sep-2018 addendum-page 2 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples am26c32idr active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 am26c32i am26c32idre4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 am26c32i am26c32idrg4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 am26c32i am26c32in active pdip n 16 25 green (rohs & no sb/br) cu nipdau n / a for pkg type -40 to 85 am26c32in am26c32insr active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 26c32i am26c32ipw active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 26c32i am26c32ipwg4 active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 26c32i am26c32ipwr active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 26c32i am26c32ipwrg4 active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 26c32i am26c32mfkb active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 5962- 9164001q2a am26c32 mfkb am26c32mjb active cdip j 16 1 tbd a42 n / a for pkg type -55 to 125 5962-9164001qe a am26c32mjb am26c32mwb active cfp w 16 1 tbd a42 n / a for pkg type -55 to 125 5962-9164001qf a am26c32mwb am26c32qd active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 am26c32q am26c32qdg4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 26c32q am26c32qdr active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 125 am26c32q (1) the marketing status values are defined as follows: active: product device recommended for new designs.
package option addendum www.ti.com 26-sep-2018 addendum-page 3 lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of am26c32, am26c32m : ? catalog: am26c32 ? enhanced product: am26c32-ep , am26c32-ep ? military: am26c32m note: qualified version definitions:
package option addendum www.ti.com 26-sep-2018 addendum-page 4 ? catalog - ti's standard catalog product ? enhanced product - supports defense, aerospace and medical applications ? military - qml certified for military and defense applications
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant am26c32cdbr ssop db 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 q1 am26c32cdr soic d 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 q1 am26c32idr soic d 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 q1 am26c32ipwr tssop pw 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 am26c32qdr soic d 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 q1 package materials information www.ti.com 27-sep-2018 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) am26c32cdbr ssop db 16 2000 367.0 367.0 38.0 am26c32cdr soic d 16 2500 333.2 345.9 28.6 am26c32idr soic d 16 2500 333.2 345.9 28.6 am26c32ipwr tssop pw 16 2000 367.0 367.0 35.0 am26c32qdr soic d 16 2500 367.0 367.0 38.0 package materials information www.ti.com 27-sep-2018 pack materials-page 2

www.ti.com package outline c 14x 0.65 2x 4.55 16x 0.30 0.19 typ 6.6 6.2 1.2 max 0.15 0.05 0.25 gage plane -8 0 b note 4 4.5 4.3 a note 3 5.1 4.9 0.75 0.50 (0.15) typ tssop - 1.2 mm max height pw0016a small outline package 4220204/a 02/2017 1 8 9 16 0.1 c a b pin 1 index area see detail a 0.1 c notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. this dimension does not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. this dimension does not include interlead flash. interlead flash shall not exceed 0.25 mm per side. 5. reference jedec registration mo-153. seating plane a 20 detail a typical scale 2.500
www.ti.com example board layout 0.05 max all around 0.05 min all around 16x (1.5) 16x (0.45) 14x (0.65) (5.8) (r0.05) typ tssop - 1.2 mm max height pw0016a small outline package 4220204/a 02/2017 notes: (continued) 6. publication ipc-7351 may have alternate designs. 7. solder mask tolerances between and around signal pads can vary based on board fabrication site. land pattern example exposed metal shown scale: 10x symm symm 1 8 9 16 15.000 metal solder mask opening metal under solder mask solder mask opening exposed metal exposed metal solder mask details non-solder mask defined (preferred) solder mask defined
www.ti.com example stencil design 16x (1.5) 16x (0.45) 14x (0.65) (5.8) (r0.05) typ tssop - 1.2 mm max height pw0016a small outline package 4220204/a 02/2017 notes: (continued) 8. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. ipc-7525 may have alternate design recommendations. 9. board assembly site may have different recommendations for stencil design. solder paste example based on 0.125 mm thick stencil scale: 10x symm symm 1 8 9 16

mechanical data msso002e ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 db (r-pdso-g**) plastic small-outline 4040065 /e 12/01 28 pins shown gage plane 8,20 7,40 0,55 0,95 0,25 38 12,90 12,30 28 10,50 24 8,50 seating plane 9,90 7,90 30 10,50 9,90 0,38 5,60 5,00 15 0,22 14 a 28 1 20 16 6,50 6,50 14 0,05 min 5,90 5,90 dim a max a min pins ** 2,00 max 6,90 7,50 0,65 m 0,15 0 ? 8 0,10 0,09 0,25 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-150

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